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Abstract
The ThinkSystem SR650 is a mainstream 2U 2-socket server with industry-leading reliability, management, and security features, and is designed to handle a wide range of workloads.
New to the SR650 is support for up to 24 NVMe solid-state drives. With this support, the SR650 is an excellent choice for workloads that need large amounts of low-latency high-bandwidth storage, including virtualized clustered SAN solutions, software-defined storage, and applications leveraging NVMe over Fabrics (NVMeOF).
This article describes the three new configurations available for the SR650:
- 16 NVMe drives + 8 SAS/SATA drives
- 20 NVMe drives
- 24 NVMe drives
You can also learn about the offerings by watching the walk-through video below.
Change History
Changes in the April 16 update:
- Noted which second-generation Intel Xeon processors are not supported - Ordering information section
Walk-through video with David Watts and Patrick Caporale
Introduction
The Lenovo ThinkSystem SR650 is a mainstream 2U 2-socket server with industry-leading reliability, management, and security features, and is designed to handle a wide range of workloads.
New to the SR650 is support for up to 24 NVMe solid-state drives. With this support, the SR650 is an excellent choice for workloads that need large amounts of low-latency high-bandwidth storage, including virtualized clustered SAN solutions, software-defined storage, and applications leveraging NVMe over Fabrics (NVMeOF).
Figure 1. ThinkSystem SR650 with 24 NVMe drives
Three new configurations are now available:
- 16 NVMe drives + 8 SAS/SATA drives
- 20 NVMe drives
- 24 NVMe drives
NVMe (Non-Volatile Memory Express) is a technology that overcomes SAS/SATA SSD performance limitations by optimizing hardware and software to take full advantage of flash technology. Intel Xeon processors efficiently transfer data in fewer clock cycles with the NVMe optimized software stack compared to the legacy AHCI stack, thereby reducing latency and overhead. NVMe SSDs connect directly to the processor via the PCIe bus, further reducing latency. NVMe drives are characterized by very high bandwidth and very low latency.
Ordering information
These configurations are available configure-to-order (CTO) in the Lenovo Data Center Solution Configurator (DCSC), https://dcsc.lenovo.com. The following table lists the feature codes related to the NVMe drive subsystem. The configurator will derive any additional components that are needed.
Field upgrades: The 20x NVMe and 24x NVMe drive configurations are also available as field upgrades as described in the Field upgrades section.
Feature code | Description |
---|---|
PCIe Switch Adapters | |
B22D | ThinkSystem 810-4P NVMe Switch Adapter (PCIe x8 adapter with four x4 drive connectors) |
AUV2 | ThinkSystem 1610-4P NVMe Switch Adapter (PCIe x16 adapter with four x4 drive connectors) |
B4PA | ThinkSystem 1610-8P NVMe Switch Adapter (PCIe x16 adapter with four connectors to connect to eight drives) |
NVMe Backplane | |
B4PC | ThinkSystem SR650 2.5' NVMe 8-Bay Backplane |
Riser Cards | |
AUR3 | ThinkSystem SR550/SR590/SR650 x16/x8 PCIe FH Riser 1 Kit (x16+x8 PCIe Riser for Riser 1, for 16 and 20-drive configurations) |
B4PB | ThinkSystem SR650 x16/x8/x16 PCIe Riser1 (x16+x8+x16 PCIe Riser for Riser 1, for 24-drive configurations) |
AURC | ThinkSystem SR550/SR590/SR650 (x16/x8)/(x16/x16) PCIe FH Riser 2 Kit (x16+x16 PCIe Riser for Riser 2, for all three configurations) |
Note the following requirements for any of the three NVMe-rich configurations:
- Two processors
- No high-thermal processors:
- 200 W or 205 W TDP are not supported
- Gold 6126T, Gold 6144, Gold 6146, or Platinum 8160T processors are not supported
- Gold 6230N, Gold 6240Y, and Gold 6244 processors are not supported
- No GPU adapters installed
- No PCIe flash adapters installed
- No PCIe adapters with more than 25 W TDP installed
- 1100 W or 1600 W power supplies installed.
- Ambient temperature of up to 30 °C (86 °F)
- If a fan fails and the ambient temperature is above 27 °C, system performance may be reduced.
Although not required, it is expected that these configurations will be fully populated with NVMe drives. Maximum performance is achieved when all NVMe drive bays are filled with drives.
To verify support and ensure that the right power supply is chosen for optimal performance, validate your server configuration using the latest version of the Lenovo Capacity Planner:
http://datacentersupport.lenovo.com/us/en/solutions/lnvo-lcp
Supported NVMe drives
See the ThinkSystem SR650 product guide for the complete list of NVMe drives that are supported in the server: https://lenovopress.com/lp0644#drives-for-internal-storage
The NVMe drives listed in the following table are not supported in the three NVMe-rich configurations.
Part number | Feature code | Description |
---|---|---|
Unsupported NVMe drives | ||
7SD7A05770 | B11L | ThinkSystem U.2 Intel P4600 6.4TB Mainstream NVMe PCIe3.0 x4 Hot Swap SSD |
7N47A00984 | AUV0 | ThinkSystem U.2 PM963 1.92TB Entry NVMe PCIe 3.0 x4 Hot Swap SSD |
7N47A00985 | AUUU | ThinkSystem U.2 PM963 3.84TB Entry NVMe PCIe 3.0 x4 Hot Swap SSD |
7N47A00095 | AUUY | ThinkSystem U.2 PX04PMB 960GB Mainstream NVMe PCIe 3.0 x4 Hot Swap SSD |
7N47A00096 | AUMF | ThinkSystem U.2 PX04PMB 1.92TB Mainstream NVMe PCIe 3.0 x4 Hot Swap SSD |
7XB7A05923 | AWG6 | ThinkSystem U.2 PX04PMB 800GB Performance NVMe PCIe 3.0 x4 Hot Swap SSD |
7XB7A05922 | AWG7 | ThinkSystem U.2 PX04PMB 1.6TB Performance NVMe PCIe 3.0 x4 Hot Swap SSD |
Configuration 1: 16x NVMe drives + 8x SAS/SATA
The 16x NVMe drive configuration has the following features:
- 16 NVMe 2.5-inch drive bays plus eight SAS/SATA 2.5-inch drive bays. All drives are hot-swap from the front of the server (provided the operating system supports hot-swap).
- The NVMe drives are connected to the processors either via NVMe Switch Adapters or via the onboard NVMe connectors on the system board of the server.
- The eight SAS/SATA drive bays are connected to a supported 8-port RAID adapter or SAS HBA.
- One PCIe x16 slot is available for high-speed networking such as a 100 GbE adapter, InfiniBand or OPA adapter. If you elect not to configure the eight SAS/SATA drive bays, then you can free up an additional x8 slot for a second networking adapter.
- The LOM (LAN on Motherboard) slot is also available for 1Gb or 10Gb Ethernet connections. Supported LOM adapters are the following:
- ThinkSystem 1Gb 2-port RJ45 LOM
- ThinkSystem 1Gb 4-port RJ45 LOM
- ThinkSystem 10Gb 2-port Base-T LOM
- ThinkSystem 10Gb 2-port SFP+ LOM
- ThinkSystem 10Gb 4-port Base-T LOM
- ThinkSystem 10Gb 4-port SFP+ LOM
- Additional support for one or two M.2 drives, if needed
The 16x NVMe drive configuration has the following performance characteristics:
- Balanced NVMe configuration. In this 16-NVMe drive configuration, each processor is connected to 8 drives. Such a balanced configuration ensures maximum performance by ensuring the processors are equally occupied handling I/O requests to and from the NVMe drives.
- No oversubscription. Lenovo NVMe drives connect using four PCIe lanes, and in this configuration, each drive is allocated 4 lanes from the processor. The 1:1 ratio means no oversubscription of the PCIe lanes from the processors and results in maximum NVMe drive bandwidth.
In the 16x NVMe drive configuration, the drive bays are configured as follows:
- Bays 0-15: NVMe drives
- Bays 16-23: SAS or SATA drives
The PCIe slots in the server are configured as follows:
- Slot 1: 1610-4P NVMe Switch Adapter
- Slot 2: Not present
- Slot 3: Supported RAID adapter for SAS/SATA drives
- Slot 4: 810-4P NVMe Switch Adapter
- Slot 5: Available x16 slot
- Slot 6: 1610-4P NVMe Switch Adapter
- Slot 7 (internal slot): 810-4P NVMe Switch Adapter
The front and rear views of the SR650 with 16x NVMe drives and 8x SAS/SATA drives is shown in the following figure.
Figure 2. SR650 front and rear views of the 16-NVMe drive configuration
The following figure shows a block diagram of how the PCIe lanes are routed from the processors to the NVMe drives.
Figure 3. SR650 block diagram of the 16-NVMe drive configuration
The details of the connections are listed in the following table.
Drive bay | Drive type | Drive lanes | Adapter | Slot | Host lanes | CPU |
---|---|---|---|---|---|---|
0 | NVMe | PCIe x4 | Onboard NVMe port | None | PCIe x8 | 2 |
1 | NVMe | PCIe x4 | 2 | |||
2 | NVMe | PCIe x4 | Onboard NVMe port | None | PCIe x8 | 2 |
3 | NVMe | PCIe x4 | 2 | |||
4 | NVMe | PCIe x4 | 1610-4P | Slot 6 (Riser 2) | PCIe x16 | 2 |
5 | NVMe | PCIe x4 | 2 | |||
6 | NVMe | PCIe x4 | 2 | |||
7 | NVMe | PCIe x4 | 2 | |||
8 | NVMe | PCIe x4 | 810-4P | Slot 4 (vertical) | PCIe x8 | 1 |
9 | NVMe | PCIe x4 | 1 | |||
10 | NVMe | PCIe x4 | 810-4P | Slot 7 (internal) | PCIe x8 | 1 |
11 | NVMe | PCIe x4 | 1 | |||
12 | NVMe | PCIe x4 | 1610-4P | Slot 1 (Riser 1) | PCIe x16 | 1 |
13 | NVMe | PCIe x4 | 1 | |||
14 | NVMe | PCIe x4 | 1 | |||
15 | NVMe | PCIe x4 | 1 | |||
16 | SAS or SATA | RAID 8i | Slot 3 (Riser 1) | PCIe x8 | 1 | |
17 | SAS or SATA | 1 | ||||
18 | SAS or SATA | 1 | ||||
19 | SAS or SATA | 1 | ||||
20 | SAS or SATA | 1 | ||||
21 | SAS or SATA | 1 | ||||
22 | SAS or SATA | 1 | ||||
23 | SAS or SATA | 1 |
Configuration 2: 20x NVMe drives
The 20x NVMe drive configuration has the following features:
- 20 NVMe 2.5-inch drive bays. All drives are hot-swap from the front of the server (provided the operating system supports hot-swap). The other 4 bays are unavailable and are covered by a 4-bay blank.
- The NVMe drives are connected to the processors either via NVMe Switch Adapters or via the onboard NVMe connectors on the system board of the server.
- One PCIe x8 slot is available for networking or other needs. The LOM (LAN on Motherboard) slot is also available for 1Gb or 10Gb Ethernet connections. Supported LOM adapters are the following:
- ThinkSystem 1Gb 2-port RJ45 LOM
- ThinkSystem 1Gb 4-port RJ45 LOM
- ThinkSystem 10Gb 2-port Base-T LOM
- ThinkSystem 10Gb 2-port SFP+ LOM
- ThinkSystem 10Gb 4-port Base-T LOM
- ThinkSystem 10Gb 4-port SFP+ LOM
- Additional support for one or two M.2 drives, if needed
The 20x NVMe drive configuration has the following performance characteristics:
- No oversubscription. Lenovo NVMe drives connect using four PCIe lanes, and in this configuration, each drive is allocated 4 lanes from the processor. The 1:1 ratio means no oversubscription of the PCIe lanes from the processors and results in maximum NVMe drive bandwidth.
- Near-balanced NVMe configuration. Unlike the 16-drive and 24-drive configurations, that 20-drive configuration has eight NVMe drives connected to processor 1, and 12 NVMe drives connected to processor 2. As a result, we recommend you to only choose this configuration if you need the additional capacity that four drives provide above the 16-drive configuration, and your workload can fully operate without an equal number of drives connected to each processor.
The PCIe slots in the server are configured as follows:
- Slot 1: 1610-4P NVMe Switch Adapter
- Slot 2: Not present
- Slot 3: Available x8 slot
- Slot 4: 810-4P NVMe Switch Adapter
- Slot 5: 1610-4P NVMe Switch Adapter
- Slot 6: 1610-4P NVMe Switch Adapter
- Slot 7 (internal slot): 810-4P NVMe Switch Adapter
The front and rear views of the SR650 with 20x NVMe drives is shown in the following figure.
Figure 4. SR650 front and rear views of the 20-NVMe drive configuration
The following figure shows a block diagram of how the PCIe lanes are routed from the processors to the NVMe drives.
Figure 5. SR650 block diagram of the 20-NVMe drive configuration
The details of the connections are listed in the following table.
Drive bay | Drive type | Drive lanes | Adapter | Slot | Host lanes | CPU | |
---|---|---|---|---|---|---|---|
0 | NVMe | PCIe x4 | Onboard NVMe port | None | PCIe x8 | 2 | |
1 | NVMe | PCIe x4 | 2 | ||||
2 | NVMe | PCIe x4 | Onboard NVMe port | None | PCIe x8 | 2 | |
3 | NVMe | PCIe x4 | 2 | ||||
4 | NVMe | PCIe x4 | 1610-4P | Slot 6 (Riser 2) | PCIe x16 | 2 | |
5 | NVMe | PCIe x4 | 2 | ||||
6 | NVMe | PCIe x4 | 2 | ||||
7 | NVMe | PCIe x4 | 2 | ||||
8 | NVMe | PCIe x4 | 1610-4P | Slot 5 (Riser 2) | PCIe x16 | 2 | |
9 | NVMe | PCIe x4 | 2 | ||||
10 | NVMe | PCIe x4 | 2 | ||||
11 | NVMe | PCIe x4 | 2 | ||||
12 | NVMe | PCIe x4 | 810-4P | Slot 4 (vertical) | PCIe x8 | 1 | |
13 | NVMe | PCIe x4 | 1 | ||||
14 | NVMe | PCIe x4 | 810-4P | Slot 7 (internal) | PCIe x8 | 1 | |
15 | NVMe | PCIe x4 | 1 | ||||
16 | NVMe | PCIe x4 | 1610-4P | Slot 1 (Riser 1) | PCIe x16 | 1 | |
17 | NVMe | PCIe x4 | 1 | ||||
18 | NVMe | PCIe x4 | 1 | ||||
19 | NVMe | PCIe x4 | 1 | ||||
20 | Blank bay - no connection | ||||||
21 | Blank bay - no connection | ||||||
22 | Blank bay - no connection | ||||||
23 | Blank bay - no connection |
Configuration 3: 24x NVMe drives
The 24x NVMe drive configuration has the following features:
- 24 NVMe 2.5-inch drive bays. All drives are hot-swap from the front of the server (provided the operating system supports hot-swap).
- The NVMe drives are connected to the processors via NVMe Switch Adapters. The onboard NVMe connectors are routed to a riser card installed in Riser slot 1.
- Two x16 slots (one connected to each processor) are available for high-speed networking such as a 100 GbE adapter, InfiniBand or OPA adapter.
- The LOM (LAN on Motherboard) slot is also available for 1Gb or 10Gb Ethernet connections. Supported LOM adapters are the following:
- ThinkSystem 1Gb 2-port RJ45 LOM
- ThinkSystem 1Gb 4-port RJ45 LOM
- ThinkSystem 10Gb 2-port Base-T LOM
- ThinkSystem 10Gb 2-port SFP+ LOM
- ThinkSystem 10Gb 4-port Base-T LOM
- ThinkSystem 10Gb 4-port SFP+ LOM
- Additional support for one or two M.2 drives, if needed
The 24x NVMe drive configuration has the following performance characteristics:
- Balanced NVMe configuration. In this 24-NVMe drive configuration, each processor is connected to 12 drives. Such a balanced configuration provides maximum performance by ensuring the processors are equally occupied handling I/O requests to and from the NVMe drives.
- 2:1 oversubscription. Lenovo NVMe drives connect using four PCIe lanes, and in this configuration each drive is allocated 2 lanes from the processor, resulting in a 2:1 oversubscription of the PCIe lanes. With 24 drives, there are simply not enough PCIe lanes in a two-socket server to support no oversubscription. As a result, the design objective is to minimize the oversubscription while still maintaining balance across all lanes.
- Balanced open slots. This configuration has two open PCIe x16 slots, one connected to each processor. These slots could be used for a pair of high-speed network cards and the result would be balanced configuration.
The PCIe slots in the server are configured as follows:
- Slot 1: 1610-8P NVMe Switch Adapter
- Slot 2: 810-4P NVMe Switch Adapter
- Slot 3: Available x16 slot
- Slot 4: 810-4P NVMe Switch Adapter
- Slot 5: Available x16 slot
- Slot 6: 810-4P NVMe Switch Adapter
- Slot 7 (internal slot): 810-4P NVMe Switch Adapter
The front and rear views of the SR650 with 24x NVMe drives is shown in the following figure.
Figure 6. SR650 front and rear views of the 24-NVMe drive configuration
The following figure shows a block diagram of how the PCIe lanes are routed from the processors to the NVMe drives.
Figure 7. SR650 block diagram of the 24-NVMe drive configuration
The details of the connections are listed in the following table.
Drive bay | Drive type | Drive lanes | Adapter | Slot | Host lanes | CPU | |
---|---|---|---|---|---|---|---|
0 | NVMe | PCIe x4 | 810-4P | Slot 6 (Riser 2) | PCIe x8 | 2 | |
1 | NVMe | PCIe x4 | |||||
2 | NVMe | PCIe x4 | 2 | ||||
3 | NVMe | PCIe x4 | |||||
4 | NVMe | PCIe x4 | 1610-8P | Slot 1 (Riser 1) | PCIe x16 (from onboard NVMe ports) | 2 | |
5 | NVMe | PCIe x4 | |||||
6 | NVMe | PCIe x4 | 2 | ||||
7 | NVMe | PCIe x4 | |||||
8 | NVMe | PCIe x4 | 2 | ||||
9 | NVMe | PCIe x4 | |||||
10 | NVMe | PCIe x4 | 2 | ||||
11 | NVMe | PCIe x4 | |||||
12 | NVMe | PCIe x4 | 810-4P | Slot 4 (vertical) | PCIe x8 | 1 | |
13 | NVMe | PCIe x4 | |||||
14 | NVMe | PCIe x4 | 1 | ||||
15 | NVMe | PCIe x4 | |||||
16 | NVMe | PCIe x4 | 810-4P | Slot 7 (internal) | PCIe x8 | 1 | |
17 | NVMe | PCIe x4 | |||||
18 | NVMe | PCIe x4 | 1 | ||||
19 | NVMe | PCIe x4 | |||||
20 | NVMe | PCIe x4 | 810-4P | Slot 2 (Riser 1) | PCIe x8 | 1 | |
21 | NVMe | PCIe x4 | |||||
22 | NVMe | PCIe x4 | 1 | ||||
23 | NVMe | PCIe x4 |
Field upgrades
The following two field upgrade option kits are available to upgrade existing SAS/SATA or AnyBay drive configurations based on the 24x 2.5' chassis (feature code AUVV) to either the 20-drive or 24-drive NVMe configurations.
Part number | Feature code | Description |
---|---|---|
4XH7A09819 | B64L | ThinkSystem SR650 U.2 20-Bays Upgrade Kit |
4XH7A08810 | B64K | ThinkSystem SR650 U.2 24-Bays Upgrade Kit |
These kits include drive backplanes and required NVMe cables, power cables, drive bay fillers, and NVMe switch adapters.
No 16-drive upgrade kit: There is no upgrade kit for the 16x NVMe drive configuration.
The ThinkSystem SR650 U.2 20-Bays Upgrade Kit includes the following components:
- Two 810-4P NVMe Switch Adapters
- Three 1610-4P NVMe Switch Adapters
- One x16/x8 PCIe Riser for Riser 1
- One x16/x16 PCIe Riser for Riser 2
- Three 8-bay NVMe drive backplanes
- One 4-bay drive bay filler
- NVMe and power cables
- Brackets and screws
- Drive bay labels for the front bezel
The ThinkSystem SR650 U.2 24-Bays Upgrade Kit includes the following components:
- Four 810-4P NVMe Switch Adapters
- One 1610-8P NVMe Switch Adapter
- One x16/x8/x16 PCIe Riser for Riser 1
- One x16/x16 PCIe Riser for Riser 2
- Three 8-bay NVMe drive backplanes
- NVMe and power cables
- Brackets and screws
- Drive bay labels for the front bezel
Further information
For more information, see these resources:
- ThinkSystem SR650 product guide
https://lenovopress.com/lp0644-lenovo-thinksystem-sr650-server - Product Guides for ThinkSystem NVMe drives:
https://lenovopress.com/servers/options/drives#term=nvme&rt=product-guide - Paper, Implementing NVMe Drives on Lenovo Servers
https://lenovopress.com/lp0508-implementing-nvme-drives-on-lenovo-servers - Paper, Comparing the Effect of PCIe Host Connections on NVMe Drive Performance
https://lenovopress.com/lp0865-comparing-the-effect-of-pcie-host-connections-on-nvme-drive-performance - Data Center Solution Configurator (DCSC) configurator
https://dcsc.lenovo.com/
Related product families
Product families related to this document are the following:
Trademarks
Lenovo and the Lenovo logo are trademarks or registered trademarks of Lenovo in the United States, other countries, or both. A current list of Lenovo trademarks is available on the Web at https://www.lenovo.com/us/en/legal/copytrade/.
The following terms are trademarks of Lenovo in the United States, other countries, or both:
Lenovo®
AnyBay®
ThinkSystem
The following terms are trademarks of other companies:
Intel® and Xeon® are trademarks of Intel Corporation or its subsidiaries.
Other company, product, or service names may be trademarks or service marks of others.
Name
orterun, mpirun, mpiexec - Execute serial and parallel jobs in Open MPI.
Note:mpirun, mpiexec, and orterun are all synonyms for each other. Using any of the names will produce the samebehavior.
Synopsis
Single Process Multiple Data (SPMD) Model:
mpirun [ options ] <program> [ <args> ]
Multiple Instruction Multiple Data (MIMD) Model:
mpirun [ global_options ] [ local_options1 ] <program1> [ <args1> ] : [ local_options2 ] <program2> [ <args2> ]: ... : [ local_optionsN ] <programN> [ <argsN> ]
Note that in both models, invoking mpirun via an absolute path name is equivalent to specifying the --prefix option with a <dir>value equivalent to the directory where mpirun resides, minus its last subdirectory. For example:
% /usr/local/bin/mpirun ...
is equivalent to
% mpirun --prefix /usr/local
Quick Summary
If you are simply looking for how to run an MPI application, you probably want to use a command line of the following form:
% mpirun [ -np X ] [ --hostfile <filename> ] <program>
This will run X copies of <program> in your current run-time environment (if running under a supported resource manager, Open MPI'smpirun will usually automatically use the corresponding resource manager process starter, as opposed to, for example, rsh or ssh, whichrequire the use of a hostfile, or will default to running all X copies on the localhost), scheduling (by default) in a round-robin fashion by CPU slot. See therest of this page for more details.
Options
mpirun will send the name of the directory where it was invoked on the local node to each of the remote nodes, and attempt to change to thatdirectory. See the 'Current Working Directory' section below for further details.
<program>The program executable. This is identified as the first non-recognized argument to mpirun.
<args>
Pass these run-time arguments to every new process. These must always be the last arguments to mpirun. If an app context file is used,<args> will be ignored.
No Hw-module Switch 1 Slot 1 Oversubscription Port-group 1
The parser for the -x option is not very sophisticated; it does not even understand quoted values. Users are advised to set variables in theenvironment, and then use -x to export (not define) them.
Description
One invocation of mpirun starts an MPI application running under Open MPI. If the application is single process multiple data (SPMD), the applicationcan be specified on the mpirun command line.
If the application is multiple instruction multiple data (MIMD), comprising of multiple programs, the set of programs and argument can be specified in oneof two ways: Extended Command Line Arguments, and Application Context.
An application context describes the MIMD program set including all arguments in a separate file. This file essentially contains multiple mpiruncommand lines, less the command name itself. The ability to specify different options for different instantiations of a program is another reason to use anapplication context.
Extended command line arguments allow for the description of the application layout on the command line using colons (:) to separate thespecification of programs and arguments. Some options are globally set across all specified programs (e.g. --hostfile), while others are specific to a singleprogram (e.g. -np).
Specifying Host Nodes
Host nodes can be identified on the mpirun command line with the -host option or in a hostfile.For example,
% cat myhostfile aa slots=2 bb slots=2 cc slots=2
Here, we list both the host names (aa, bb, and cc) but also how many 'slots' there are for each. Slots indicate how many processes can potentially executeon a node. For best performance, the number of slots may be chosen to be the number of cores on the node or the number of processor sockets. If the hostfiledoes not provide slots information, a default of 1 is assumed. When running under resource managers (e.g., SLURM, Torque, etc.), Open MPI will obtain both thehostnames and the number of slots directly from the resource manger.
Specifying Number of Processes
As we have just seen, the number of processes to run can be set using the hostfile. Other mechanisms exist.The number of processes launched can be specified as a multiple of the number of nodes or processor sockets available. For example,
% cat myhostfile aa slots=4 bb slots=4 cc slots=4
Now,
Mapping Processes to Nodes
The examples above illustrate the default mapping of process ranks to nodes. This mapping can also be controlled with various mpirun options. Here,we consider the same hostfile as above with -np 6 again:node aa node bb node cc
mpirun 0 1 2 3 4 5
mpirun -loadbalance 0 1 2 3 4 5
mpirun -bynode 0 3 1 4 2 5
mpirun -nolocal 0 1 2 3 4 5
The -loadbalance option tries to spread processes out fairly among the nodes.
The -bynode option does likewise but numbers the processes in 'by node' in a round-robin fashion.
The -nolocal option prevents any processes from being mapped onto the local host (in this case node aa). While mpirun typically consumes fewsystem resources, -nolocal can be helpful for launching very large jobs where mpirun may actually need to use noticable amounts of memory and/orprocessing time.
Just as -np can specify fewer processes than there are slots, it can also oversubscribe the slots. For example, with the same hostfile:
The max_slots field specifies such a limit. When it does, the slots value defaults to the limit. Now:
Of course, -np can also be used with the -H or -host option. For example,
Process Binding
Processes may be bound to specific resources on a node. This can improve performance if the operating system is placing processes suboptimally. For example,it might oversubscribe some multi-core processor sockets, leaving other sockets idle; this can lead processes to contend unnecessarily for common resources.Or, it might spread processes out too widely; this can be suboptimal if application performance is sensitive to interprocess communication costs. Binding canalso keep the operating system from migrating processes excessively, regardless of how optimally those processes were placed to begin with.To bind processes, one must first associate them with the resources on which they should run. For example, the -bycore option associates theprocesses on a node with successive cores. Or, -bysocket associates the processes with successive processor sockets, cycling through the sockets in around-robin fashion if necessary. And -cpus-per-proc indicates how many cores to bind per process.
But, such association is meaningless unless the processes are actually bound to those resources. The binding option specifies the granularity of binding --say, with -bind-to-core or -bind-to-socket. One can also turn binding off with -bind-to-none, which is typically the default.
Finally, -report-bindings can be used to report bindings.
As an example, consider a node with two processor sockets, each comprising four cores. We run mpirun with -np 4 -report-bindings and thefollowing additional options:
% mpirun ... -bycore -bind-to-core [...] ... binding child [...,0] to cpus 0001 [...] ... binding child [...,1] to cpus 0002 [...] ... binding child [...,2]to cpus 0004 [...] ... binding child [...,3] to cpus 0008
% mpirun ... -bysocket -bind-to-socket [...] ... binding child [...,0] to socket 0 cpus 000f [...] ... binding child [...,1] to socket 1 cpus 00f0 [...] ...binding child [...,2] to socket 0 cpus 000f [...] ... binding child [...,3] to socket 1 cpus 00f0
% mpirun ... -cpus-per-proc 2 -bind-to-core [...] ... binding child [...,0] to cpus 0003 [...] ... binding child [...,1] to cpus 000c [...] ... bindingchild [...,2] to cpus 0030 [...] ... binding child [...,3] to cpus 00c0
% mpirun ... -bind-to-none
Here, -report-bindings shows the binding of each process as a mask. In the first case, the processes bind to successive cores as indicated by themasks 0001, 0002, 0004, and 0008. In the second case, processes bind to all cores on successive sockets as indicated by the masks 000f and 00f0. The processescycle through the processor sockets in a round-robin fashion as many times as are needed. In the third case, the masks show us that 2 cores have been bind perprocess. In the fourth case, binding is turned off and no bindings are reported.
Open MPI's support for process binding depends on the underlying operating system. Therefore, processing binding may not be available on every system.
Process binding can also be set with MCA parameters. Their usage is less convenient than that of mpirun options. On the other hand, MCA parameterscan be set not only on the mpirun command line, but alternatively in a system or user mca-params.conf file or as environment variables, as described inthe MCA section below. The correspondences are:
mpirun option MCA parameter key value
-bycore rmaps_base_schedule_policy core -bysocket rmaps_base_schedule_policy socket -bind-to-core orte_process_binding core -bind-to-socketorte_process_binding socket -bind-to-none orte_process_binding none
The orte_process_binding value can also take on the :if-avail attribute. This attribute means that processes will be bound only if this issupported on the underlying operating system. Without the attribute, if there is no such support, the binding request results in an error. For example, youcould have
% cat $HOME/.openmpi/mca-params.conf rmaps_base_schedule_policy = socket orte_process_binding = socket:if-avail
Rankfiles
Rankfiles provide a means for specifying detailed information about how process ranks should be mapped to nodes and how they should be bound. Consider thefollowing:cat myrankfile rank 0=aa slot=1:0-2 rank 1=bb slot=0:0,1 rank 2=cc slot=1-2 mpirun -H aa,bb,cc,dd -rf myrankfile ./a.out So that
Rank 0 runs on node aa, bound to socket 1, cores 0-2. Rank 1 runs on node bb, bound to socket 0, cores 0 and 1. Rank 2 runs on node cc, bound to cores 1 and2.
Application Context or Executable Program?
- node(s).
- mpirun -mca btl tcp,self -np 1 foo
- Tells Open MPI to use the 'tcp' and 'self' BTLs, and to run a single copy of 'foo' an allocated node.
- mpirun -mca btl self -np 1 foo
- Tells Open MPI to use the 'self' BTL, and to run a single copy of 'foo' an allocated node. The -mca switch can be used multiple times to specify different <key> and/or <value> arguments. If the same<key> is specified more than once, the <value>s are concatenated with a comma (',') separating them.
- mpirun -np 4 -mca btl tcp,sm,self
- --mca btl_tcp_if_include ce0 prog1
Run 4 copies of prog1 using the 'tcp', 'sm' and 'self' BTLs for the transport of MPI messages, with TCP using only the ce0 interface to communicate. Note thatother BTLs have similar if_include MCA parameters.
If a relative directory is specified, it must be relative to the initial working directory determined by the specific starter used. For example when usingthe rsh or ssh starters, the initial directory is $HOME by default. Other starters may set the initial directory to the current working directory from theinvocation of mpirun.
Current Working Directory
The -wdir mpirun option (and its synonym, -wd) allows the user to change to an arbitrary directory before the program is invoked. It can alsobe used in application context files to specify working directories on specific nodes and/or for specific applications.If the -wdir option appears both in a context file and on the command line, the context file directory will override the command line value.
If the -wdir option is specified, Open MPI will attempt to change to the specified directory on all of the remote nodes. If this fails, mpirunwill abort.
If the -wdir option is not specified, Open MPI will send the directory name where mpirun was invoked to each of the remote nodes. Theremote nodes will try to change to that directory. If they are unable (e.g., if the directory does not exit on that node), then Open MPI will use the defaultdirectory determined by the starter.
All directory changing occurs before the user's program is invoked; it does not wait until MPI_INIT is called.
Standard I/O
Open MPI directs UNIX standard input to /dev/null on all processes except the MPI_COMM_WORLD rank 0 process. The MPI_COMM_WORLD rank 0 process inheritsstandard input from mpirun. Note: The node that invoked mpirun need not be the same as the node where the MPI_COMM_WORLD rank 0 processresides. Open MPI handles the redirection of mpirun's standard input to the rank 0 process.Open MPI directs UNIX standard output and error from remote nodes to the node that invoked mpirun and prints it on the standard output/error ofmpirun. Local processes inherit the standard output/error of mpirun and transfer to it directly.
Thus it is possible to redirect standard I/O for Open MPI applications by using the typical shell redirection procedure on mpirun.
% mpirun -np 2 my_app < my_input > my_output
Note that in this example only the MPI_COMM_WORLD rank 0 process will receive the stream from my_input on stdin. The stdin on all the othernodes will be tied to /dev/null. However, the stdout from all nodes will be collected into the my_output file.
Signal Propagation
When orterun receives a SIGTERM and SIGINT, it will attempt to kill the entire job by sending all processes in the job a SIGTERM, waiting a small number ofseconds, then sending all processes in the job a SIGKILL.SIGUSR1 and SIGUSR2 signals received by orterun are propagated to all processes in the job.
One can turn on forwarding of SIGSTOP and SIGCONT to the program executed by mpirun by setting the MCA parameter orte_forward_job_control to 1. A SIGTSTOPsignal to mpirun will then cause a SIGSTOP signal to be sent to all of the programs started by mpirun and likewise a SIGCONT signal to mpirun will cause aSIGCONT sent.
Other signals are not currently propagated by orterun.
Process Termination / Signal Handling
During the run of an MPI application, if any rank dies abnormally (either exiting before invokingNo Hw-module Slot 1 Oversubscription Port-group 1
MPI_FINALIZE, or dying as the result of a signal),mpirun will print out an error message and kill the rest of the MPI application.User signal handlers should probably avoid trying to cleanup MPI state (Open MPI is, currently, neither thread-safe nor async-signal-safe). For example, ifa segmentation fault occurs in MPI_SEND (perhaps because a bad buffer was passed in) and a user signal handler is invoked, if this user handler attemptsto invoke MPI_FINALIZE, Bad Things could happen since Open MPI was already 'in' MPI when the error occurred. Since mpirun will notice that theprocess died due to a signal, it is probably not necessary (and safest) for the user to only clean up non-MPI state.
Process Environment
Processes in the MPI application inherit their environment from the Open RTE daemon upon the node on which they are running. The environment is typicallyinherited from the user's shell. On remote nodes, the exact environment is determined by the boot MCA module used. The rsh launch module, for example,uses either rsh/ssh to launch the Open RTE daemon on remote nodes, and typically executes one or more of the user's shell-setup files beforelaunching the Open RTE daemon. When running dynamically linked applications which require the LD_LIBRARY_PATH environment variable to be set, care mustbe taken to ensure that it is correctly set when booting Open MPI.See the 'Remote Execution' section for more details.
Remote Execution
Open MPI requires that the PATH environment variable be set to find executables on remote nodes (this is typically only necessary in rsh- orssh-based environments -- batch/scheduled environments typically copy the current environment to the execution of remote jobs, so if the currentenvironment has PATH and/or LD_LIBRARY_PATH set properly, the remote nodes will also have it set properly). If Open MPI was compiled with sharedlibrary support, it may also be necessary to have the LD_LIBRARY_PATH environment variable set on remote nodes as well (especially to find the sharedlibraries required to run user MPI applications).However, it is not always desirable or possible to edit shell startup files to set PATH and/or LD_LIBRARY_PATH. The --prefix option isprovided for some simple configurations where this is not possible.
The --prefix option takes a single argument: the base directory on the remote node where Open MPI is installed. Open MPI will use this directory toset the remote PATH and LD_LIBRARY_PATH before executing any Open MPI or user applications. This allows running Open MPI jobs without havingpre-configured the PATH and LD_LIBRARY_PATH on the remote nodes.
Open MPI adds the basename of the current node's 'bindir' (the directory where Open MPI's executables are installed) to the prefix and uses that to set thePATH on the remote node. Similarly, Open MPI adds the basename of the current node's 'libdir' (the directory where Open MPI's libraries are installed)to the prefix and uses that to set the LD_LIBRARY_PATH on the remote node. For example:
Local bindir:/local/node/directory/bin
Local libdir:
/local/node/directory/lib64
If the following command line is used:% mpirun --prefix /remote/node/directory
Open MPI will add '/remote/node/directory/bin' to the PATH and '/remote/node/directory/lib64' to the D_LIBRARY_PATH on the remote node beforeattempting to execute anything.
Note that --prefix can be set on a per-context basis, allowing for different values for different nodes.
The --prefix option is not sufficient if the installation paths on the remote node are different than the local node (e.g., if '/lib' is used on thelocal node, but '/lib64' is used on the remote node), or if the installation paths are something other than a subdirectory under a common prefix.
Note that executing mpirun via an absolute pathname is equivalent to specifying --prefix without the last subdirectory in the absolutepathname to mpirun. For example:
% /usr/local/bin/mpirun ...
is equivalent to
% mpirun --prefix /usr/local
Exported Environment Variables
- <value> argument is the value that is passed. For example:
Note that the -mca switch is simply a shortcut for setting environment variables. The same effect may be accomplished by setting correspondingenvironment variables before running mpirun. The form of the environment variables that Open MPI sets is:
OMPI_MCA_<key>=<value>
Thus, the -mca switch overrides any previously set environment variables. The -mca settings similarly override MCA parameters set in the$OPAL_PREFIX/etc/openmpi-mca-params.conf or $HOME/.openmpi/mca-params.conf file.
Unknown <key> arguments are still set as environment variable -- they are not checked (by mpirun) for correctness. Illegal or incorrect<value> arguments may or may not be reported -- it depends on the specific MCA module.
To find the available component types under the MCA architecture, or to find the available parameters for a specific component, use the ompi_infocommand. See the ompi_info(1) man page for detailed information on the command.
Examples
Be sure also to see the examples throughout the sections above.
Return Value
mpirun returns 0 if all ranks started by mpirun exit after calling MPI_FINALIZE. A non-zero value is returned if an internal error occurred inmpirun, or one or more ranks exited before calling MPI_FINALIZE. If an internal error occurred in mpirun, the corresponding error code is returned. In theevent that one or more ranks exit before calling MPI_FINALIZE, the return value of the rank of the process that mpirun first notices died before callingMPI_FINALIZE will be returned. Note that, in general, this will be the first rank that died but is not guaranteed to be so.